advanced information htmos tm high temperature products high temperature n-channel power fet HTNFET down-hole oil, gas and geothermal well aerospace and avionics turbine engine control industrial process control nuclear reactor electric power conversion heavy duty internal combustion engines ?specified over -55 to +225 c output current up to 1 amp continuous typical input voltage up to 60v silicon-on-insulator (soi) 4-pin power-tab package, 8-pin ceramic dip with integral heat sink or die dimensions 4.699 x 2.286 mm features applications the HTNFET is a high reliability n-channel power fet designed specifically for extremely wide temperature range applications such as down-hole instrumentation, aerospace, turbine engine and industrial process control. this power fet is fabricated using a silicon-on-insulator (soi) process that dramatically reduces leakage currents at high temperatures. general description solid state electronics center ? 12001 state highway 55, plymouth, mn 55441 ? (800) 323-8295 ? http://www.ssec.honeywell. com high dc current capability combined with low rds-on make this component suitable both for dc and switching applica- tions. typically, parts will operate at +300 c up to a year, with derated performance. all parts are burned in to elimi- nate infant mortality. additionally, each part is tested over - 55 to +225 c to provide guaranteed performance over the entire temperature band. functional diagram drain gate source package diagrams 4-pin power-tab package 8-pin ceramic dip with heat sink 1 2 3 4 8 6 5 7 a a a a a a a a a a a a gate source source source drain drain drain gate die diagram
HTNFET 900214 rev. d 6-04 honeywell reserves the right to make changes to any products or technology herein to improve reliability, function or design. h oneywell does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others. electrical characteristics absolute maximum ratings (1, 2) (1) stresses in excess of those listed above may result in permanent damage. these are stress ratings only, and operation at these levels is not implied. frequent or extended exposure to absolute maximum conditions may affect device reliability. (2) esd sensitivity is determined by the gate capacitance; additional esd protection would decrease performance. (3) derate power at 1w/c to tj = 300 c. -55 to +225 c, unless otherwise specified (1) typical operating conditions: vds = 10 v, ta=25 c. (2) worst case operating conditions: vds = 50 v, ta = -55 to 225 c. l o b m y ss r e t e m a r a ps n o i t i d n o ce u l a vs t i n u i d t n e r r u c n i a r d s u o u n i t n o cc 5 2 = j t @d b ta i d t n e r r u c n i a r d s u o u n i t n o cc 0 0 2 = j t @d b ta v s g e g a t l o v e c r u o s - o t - e t a g0 1v t d / v dy r e v o c e r e d o i d k a e pd b ts n / v t j n o i t c n u j g n i t a r e p o0 0 3 + o t 5 5 -c g t s te g n a r e r u t a r e p m e t e g a r o t s0 0 3 + o t 5 5 -c d pr e w o p g n i t a r e p oc 0 5 2 = j t @0 5) 3 ( w idss vs temperature 1.00e-11 1.00e-10 1.00e-09 1.00e-08 1.00e-07 1.00e-06 1.00e-05 1.00e-04 0 50 100 150 200 250 temperature (c) idss (a) vds = 90 v vds = 50 v vds = 10 v l o b m y ss r e t e m a r a ps n o i t i d n o c t s e tp y t ) 1 ( e s a c t s r o w ) 2 ( s t i n u n i mx a m s s d ) r b ( ve g a t l o v n w o d k a e r b e c r u o s - n i a r d c d a 0 0 1 = d i , 0 = s g v 5 5v ) n o ( s d r e t a t s - n o e c r u o s - o t - n i a r d c i t a t s c 5 2 = a t @ e c n a t s i s e r a 1 . 0 = d i , c d v 5 + = s g v4 . 0 ? ) h t ( s g v @ e g a t l o v d l o h s e r h t e t a g c 5 2 = a t a 0 0 1 = d i , s d v = s g v6 . 14 . 2v s s g i e g a k a e l d r a w r o f e c r u o s - o t - e t a gc d v 5 + = s g v0 0 1a n e g a k a e l e s r e v e r e c r u o s - o t - e t a gc d v 5 - = s g v0 0 1 -a n n g i s e d y b d e e t n a r a u g g q) d g c + s g c ( e g r a h c e t a g l a t o t p e e w s , s g v ( v 5 + = s g v ; v 0 5 + = d d v ; % 0 1 = d ; ) v 0 1 + o t 0 = = s m 1 3 . 4c n ) n o ( d te m i t y a l e d n o - n r u t ; v 0 5 + = d d v ; v 0 1 + o t 0 = p e e w s , s g v ; % 1 . 0 = d = ; s m 1 5 1 = d r ? 0 3 = g r , ? 0 1s n r te m i t e s i r 0 2s n ) f f o ( d te m i t y a l e d f f o - n r u t 4 6s n f te m i t l l a f 0 2s n s s i ce c n a t i c a p a c t u p n i v 8 2 + = s d v , 0 = s g v ) n o i t a l l i c s o v 1 . 0 ( z h m 0 . 1 = f 0 9 2f p s s o ce c n a t i c a p a c t u p t u o 7 8f p s s r ce c n a t i c a p a c r e f s n a r t e s r e v e r 4 1f p
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